IAS2 Intelligent Audio Switcher ver 2 PAGE 1 1 ; 2 ; Intelligent Audio Switcher 3 ; version 2 device driver tests 4 ; AT87c51 microprocessor 5 ; Harris CD22M3494 crosspoint switches (vice CD4051's) 6 ; 93C66 serial EEPROM in word mode 7 ; AT keyboard 8 ; 6-wire RS-232 interface 9 ; 10 ; 7.3728 MHz clock 11 ; 12 ; Primary controls 13 $MOD51 14 $TITLE(Intelligent Audio Switcher ver 2) 15 $PAGEWIDTH(132) 16 $NODEBUG 17 $OBJECT 18 $PAGING 19 ; 20 ; 21 ; Register definitions. 22 23 EET0 EQU r5 ; register for temp data 24 EET1 EQU r6 ; LO byte 25 EET2 EQU r7 ; HI byte 26 27 ; Microcontroller connections to 93Cxx control pins. 28 0097 29 NV_CS BIT p1.7 ; 93Cxx chip select 0096 30 NV_SK BIT p1.6 ; serial data clock 0095 31 NV_DI BIT p1.5 ; serial data input 0094 32 NV_DO BIT p1.4 ; serial data output 33 34 ; Microcontroller connections to AT keyboard 35 00B2 36 KB_clk BIT p3.2 ;int0 00B3 37 KB_data BIT p3.3 38 $EJECT IAS2 Intelligent Audio Switcher ver 2 PAGE 2 0008 39 DSEG AT 08h 40 0008 41 ORG 08H ; stack origin 0008 42 stack: DS 18H ; stack depth 43 ---- 44 BSEG 0000 45 KB_F1: dbit 1 ;set if expecting parity or stop 0001 46 KB_F2: dbit 1 ;set if expecting stop 0002 47 KB_SM: dbit 1 ;set if sending data 0003 48 KB_PB: dbit 1 ;parity bit received / to send 0004 49 KB_PR: dbit 1 ;parity of received byte 0005 50 KB_2B: dbit 1 ;current send has a second byte 0006 51 KB_ready: dbit 1 ;KB_BUF holds a received byte 0007 52 test_arm: dbit 1 ;for testing 0001 53 bseg_lth equ ($+7)/8 54 ---- 55 DSEG 0020 56 flags: ds bseg_lth ;for bit flags 0021 57 KB_ASM: ds 1 ;assembly/disassembly register 0022 58 KB_BUF: ds 1 ;received byte 0023 59 KB_CNT: ds 1 ;send progress counter (set = 10) 0024 60 KB_SD1: ds 1 ;first or only byte for send 0025 61 KB_SD2: ds 1 ;second byte for send 0026 62 test_data: ds 1 63 $EJECT IAS2 Intelligent Audio Switcher ver 2 PAGE 3 ---- 64 CSEG 65 0000 66 ORG 0000H ; power on/reset vector 0000 020024 67 jmp on_reset 68 0003 69 ORG 0003H ; external interrupt 0 vector 0003 0200F3 70 jmp kbi ; keyboard input 71 000B 72 ORG 000BH ; timer 0 overflow vector 000B 32 73 reti ; undefined 74 0013 75 ORG 0013H ; external interrupt 1 vector 0013 32 76 reti ; undefined 77 001B 78 ORG 001BH ; timer 1 overflow vector 001B 32 79 reti ; undefined 80 0023 81 ORG 0023H ; serial I/O interrupt vector 0023 32 82 reti ; undefined 83 $EJECT IAS2 Intelligent Audio Switcher ver 2 PAGE 4 84 USING 0 ; register bank zero 0024 85 on_reset: 0024 758107 86 mov sp, #(stack-1) ; initialize stack pointer 87 88 ; Initialize 93C66 control lines. 89 0027 C297 90 clr NV_CS ; low 0029 C296 91 clr NV_SK ; low 002B D295 92 setb NV_DI ; high 002D D294 93 setb NV_DO ; high 94 95 ; Initialize UART for polled 4800 96 ; uses 7.3728 MHz oscillator (highest = 38400) 97 002F 759852 98 mov SCON,#52h ;set SM=1, REN=1, TI=1 0032 758780 99 mov PCON,#80h ;set double baud rate 0035 758920 100 mov TMOD,#20h ;timer 1 autoload mode 0038 758DF8 101 mov TH1,#0F8h ;38400/8 = 4800 003B D28E 102 setb TR1 ;start timer 1 103 104 ; Initialize external interupt 0 for edge triggered 105 003D D288 106 setb IT0 107 108 ; Initialize variables 003F E4 109 clr a 0040 F520 110 mov flags,a 0042 F526 111 mov test_data,a 0044 F4 112 cpl a 0045 F521 113 mov KB_ASM,a 114 115 ; Enable the interupt system 116 0047 75A881 117 mov IE,#81h ;EA and EX0 118 119 004A 75F004 120 mov b,#04h ;read NVRAM location 4 (nodes) 004D 12014E 121 call EER 122 $EJECT IAS2 Intelligent Audio Switcher ver 2 PAGE 5 0050 20A003 123 Main: jb p2.0,button1 ;if button 0 not pressed 0053 852080 124 mov p0,flags ;show flags for now 0056 20A102 125 Button1: jb p2.1,button2 ;if button 1 not pressed 0059 8980 126 mov p0,r1 ;show r1 005B 20A202 127 Button2: jb p2.2,button3 ;if button 2 not pressed 005E 8A80 128 mov p0,r2 ;show r2 0060 20A302 129 Button3: jb p2.3,button4 ;if button 3 not pressed 0063 8B80 130 mov p0,r3 ;show r3 0065 20A402 131 Button4: jb p2.4,button5 ;if button 4 not pressed 0068 8C80 132 mov p0,r4 ;show r4 006A 20A503 133 Button5: jb p2.5,button6 ;if button 5 not pressed 006D 852180 134 mov p0,KB_asm ;show assembly register 0070 20A602 135 Button6: jb p2.6,button7 ;if button 6 not pressed 0073 8E80 136 mov p0,r6 ;show r6 0075 20A702 137 Button7: jb p2.7,serout ;if button 7 not pressed 0078 8F80 138 mov p0,r7 ;show r7 139 007A 309905 140 Serout: jnb TI,serin ;if not able to transmit 007D C299 141 clr TI 007F 858099 142 mov SBUF,p0 ;send whatever is on port 0 143 0082 309804 144 Serin: jnb RI,kbin ;if not serial received 0085 AC99 145 mov r4,SBUF 0087 C298 146 clr RI 147 0089 300622 148 Kbin: jnb KB_ready,Kbout ;check for keyboard 008C C206 149 clr KB_ready 008E A801 150 mov r0,ar1 ;inch down 0090 A902 151 mov r1,ar2 0092 AA03 152 mov r2,ar3 0094 AB22 153 mov r3,KB_BUF ;newest byte 0096 BBFA0B 154 cjne r3,#0FAh,Kbin1 ;check for ACK 0099 300512 155 jnb KB_2B,Kbout ;if last byte 009C C205 156 clr KB_2B 009E E525 157 mov a,KB_SD2 00A0 11D1 158 acall KB_Send 00A2 800A 159 sjmp Kbout 160 00A4 BBFE07 161 Kbin1: cjne r3,#0FEh,Kbout ;check for resend (optional) 00A7 309304 162 jnb p1.3,Kbout ;if resend disabled 00AA E524 163 mov a,KB_SD1 00AC 11D1 164 acall KB_Send 165 00AE 209004 166 Kbout: jb p1.0,Kbout1 ;if arming pin not grounded 00B1 D207 167 setb test_arm ;arm the KB send test 00B3 809B 168 jmp main 00B5 209110 169 Kbout1: jb p1.1,Kbout2 ;if fire pin not grounded 00B8 30070D 170 jnb test_arm,Kbout2 ;if not armed 00BB C207 171 clr test_arm 00BD E526 172 mov a,test_data 00BF 04 173 inc a 00C0 5407 174 anl a,#07h ;limit to 3 bits 00C2 F526 175 mov test_data,a 00C4 F5F0 176 mov b,a 00C6 11CA 177 acall KB_SetLed 00C8 8086 178 Kbout2: jmp main ;loop 179 $EJECT IAS2 Intelligent Audio Switcher ver 2 PAGE 6 =1 180 $INCLUDE(KBIO.PRC) =1 181 ;routines to exchange data with an AT style keyboard =1 182 ; =1 183 ;routine to initiate sending a command and optional parameter to the keyboard =1 184 ;this routine has several entry points, depending on desired result =1 185 =1 186 =1 187 ;KB_SetLED - send parameter in *b* to LED register of keyboard =1 188 ;Entry b = LED flags, bit 0 = Scroll Lock =1 189 ; bit 1 = Num Lock =1 190 ; bit 2 = Caps Lock =1 191 ;Exit registers A and b destroyed =1 192 ;Uses A, b =1 193 ;Calls KB_CmdPrm (fall through) =1 194 00CA 74ED =1 195 KB_SetLED: mov a,#0EDh ;set/reset status LEDs command =1 196 =1 197 =1 198 ;KB_CmdPrm - send command in *a* with parameter in *b* =1 199 ;Entry A = command code =1 200 ; b = parameter =1 201 ;Exit registers A and b destroyed =1 202 ;Uses A, b =1 203 ;Calls KB_cmd (fall through) =1 204 00CC 85F025 =1 205 KB_CmdPrm: mov KB_SD2,b ;store the parameter for later 00CF D205 =1 206 setb KB_2B ;set 2-byte flag =1 207 =1 208 =1 209 ;KB_Send - send byte in *a* =1 210 ;Entry A = byte to send =1 211 ;Exit registers A and b destroyed =1 212 ;Uses A, b =1 213 ;Calls none =1 214 00D1 F524 =1 215 KB_Send: mov KB_SD1,a ;store the byte 00D3 2001FD =1 216 jb KB_F2,$ ;wait if rcv is beyond parity bit 00D6 C200 =1 217 clr KB_F1 ;next int treated as receive data 00D8 C2B2 =1 218 clr KB_clk ;interrupt keyboard (causes int to us) 00DA 75230A =1 219 mov KB_cnt,#10 ;setup send state 00DD A2D0 =1 220 mov c,psw.0 ;parity bit 00DF B3 =1 221 cpl c 00E0 9203 =1 222 mov KB_PB,c 00E2 F521 =1 223 mov KB_ASM,a ;byte to send 00E4 D202 =1 224 setb KB_SM ;set send mode 00E6 C200 =1 225 clr KB_F1 00E8 75F023 =1 226 mov b,#35 ;wait 60uS 00EB D5F0FD =1 227 djnz b,$ 00EE C2B3 =1 228 clr KB_data ;request to send 00F0 D2B2 =1 229 setb KB_clk ;release clock line 00F2 22 =1 230 ret =1 231 ;The interrupt handler will do the rest of the work to send the byte =1 232 ;however the keyboard response (ACK or RESEND) must be processed by =1 233 ;the normal keyboard upstream process, also initiating transfer of the =1 234 ;second byte if KB_2B is set as follows: =1 235 ; mov a,KB_buf =1 236 ; cjne a,#0FAh,NoAck ;check for ACK =1 237 ; jnb KB_2B,done ;if last byte IAS2 Intelligent Audio Switcher ver 2 PAGE 7 =1 238 ; clr KB_2B =1 239 ; mov a,KB_SD2 =1 240 ; acall KB_Send =1 241 ; sjmp done =1 242 ;NoAck: cjne a,#0FEh,done ;check for resend (optional) =1 243 ; mov a,KB_SD1 =1 244 ; acall KB_Send =1 245 ;Done: =1 246 =1 247 =1 248 $EJECT IAS2 Intelligent Audio Switcher ver 2 PAGE 8 =1 249 ;This is the interrupt handler for the AT style keyboard 00F3 C0D0 =1 250 KBI: push psw 00F5 C0E0 =1 251 push acc 00F7 E521 =1 252 mov a,KB_ASM ;initially all ones 00F9 200232 =1 253 jb KB_SM,KBO ;if in send mode 00FC A2B3 =1 254 mov c,KB_data ;newest bit 00FE 300015 =1 255 jnb KB_F1,KBI2 ;if within data bits =1 256 =1 257 ;expecting either parity or stop 0101 20010A =1 258 jb KB_F2,KBI1 ;if beyond parity 0104 D201 =1 259 setb KB_F2 ;stop bit next 0106 9203 =1 260 mov KB_PB,c ;parity bit received 0108 A2D0 =1 261 mov c,psw.0 010A 9204 =1 262 mov KB_PR,c ;parity of received byte 010C 801B =1 263 sjmp KBIx =1 264 =1 265 ;expecting stop (1) bit 010E 400E =1 266 KBI1: jc KBI3 ;stop bit OK 0110 C201 =1 267 clr KB_F2 0112 A203 =1 268 mov c,KB_PB ;insert the "parity" bit 0114 13 =1 269 rrc a 0115 C3 =1 270 clr c ;insert 0 for "stop" bit 0116 13 =1 271 KBI2: rrc a ;shift in new bit and test for full 0117 F521 =1 272 mov KB_ASM,a 0119 B3 =1 273 cpl c ;1 if start bit just shifted out 011A 9200 =1 274 mov KB_F1,c 011C 800B =1 275 sjmp KBIx =1 276 =1 277 ;reception complete 011E F522 =1 278 KBI3: mov KB_BUF,a ;buffer the received byte 0120 D206 =1 279 setb KB_ready ;data received flag 0122 7521FF =1 280 KBI4: mov KB_ASM,#0FFh ;setup for next byte 0125 C200 =1 281 clr KB_F1 0127 C201 =1 282 clr KB_F2 =1 283 0129 D0E0 =1 284 KBIx: pop acc 012B D0D0 =1 285 pop psw 012D 32 =1 286 reti =1 287 =1 288 ;Send mode - 8 data, 1 parity, and 1 stop bit sent via interupt handler 012E 300007 =1 289 KBO: jnb KB_F1,KBO1 ;if not waiting for ack 0131 20B3F5 =1 290 jb KB_data,KBIx ;if not here yet 0134 C202 =1 291 clr KB_SM 0136 80EA =1 292 jmp KBI4 ;prepare to receive =1 293 0138 D52308 =1 294 KBO1: djnz KB_CNT,KBO2 ;if in data or parity portion 013B D200 =1 295 setb KB_F1 ;wait for ack 013D D2B3 =1 296 setb KB_data ;stop bit 013F D292 =1 297 setb p1.2 ;scope sync 0141 80E6 =1 298 sjmp KBIx =1 299 =1 300 ;send data or parity. Parity is preset in KB_PB and used to fill KB_ASM 0143 C292 =1 301 KBO2: clr p1.2 ;scope sync 0145 A203 =1 302 mov c,KB_PB 0147 13 =1 303 rrc a 0148 F521 =1 304 mov KB_ASM,a 014A 92B3 =1 305 mov KB_data,c 014C 80DB =1 306 sjmp KBIx IAS2 Intelligent Audio Switcher ver 2 PAGE 9 =1 307 308 $EJECT IAS2 Intelligent Audio Switcher ver 2 PAGE 10 =1 309 $INCLUDE(93C66W.PRC) =1 310 ;EEPROM routines for WORD access to a 93c66 from 8051 core MPU =1 311 ; =1 312 ;Higher Functions: =1 313 ;EER reads one word =1 314 ;WEN enables write =1 315 ;WDS disables write =1 316 ;EEW writes one word =1 317 =1 318 ;EER - read one 16-bit word from address *b* into EET2:EET1 =1 319 ;Entry b = address =1 320 ; NV_CS and NV_SK = 0 =1 321 ;Uses EET0 to hold address =1 322 ; EET2:EET1 to hold data =1 323 ; a, b destroyed =1 324 ;Calls EEA (issue command and address) =1 325 ; EED (read byte) =1 326 014E =1 327 EER: 014E 74C0 =1 328 mov a,#0C0h ;start bit and read command 0150 317D =1 329 acall EEA ;issue command and address 0152 3197 =1 330 acall EED ;read MSB 0154 FF =1 331 mov EET2,a 0155 3197 =1 332 acall EED ;read LSB 0157 FE =1 333 mov EET1,a 0158 8020 =1 334 sjmp EEW1 ;drop NV_CS and return =1 335 =1 336 ;WEN - enable write =1 337 ;Entry NV_CS and NV_SK = 0 =1 338 ;Uses EET0 to hold parameter (C0h for write enable) =1 339 ; a, b destroyed =1 340 ;Calls WDS (jump into) =1 341 015A =1 342 WEN: 015A 75F0C0 =1 343 mov b,#0c0h ;control parameter to enable write 015D 8003 =1 344 sjmp WDS1 ;continue in WDS =1 345 =1 346 ;WDS - disable write =1 347 ;Entry NV_CS and NV_SK = 0 =1 348 ;Uses EET0 to hold parameter (00h for write disable) =1 349 ; a, b destroyed =1 350 ;Calls EEA (issue command and parameter) =1 351 015F =1 352 WDS: 015F 75F000 =1 353 mov b,#00h ;control parameter to disable write 0162 =1 354 WDS1: 0162 7480 =1 355 mov a,#80h ;start bit and control command 0164 317D =1 356 acall EEA ;issue command and parameter (as address) 0166 8012 =1 357 sjmp EEW1 ;drop NV_CS and return =1 358 =1 359 ;EEW - write one 16-bit word at address *b* from EET2:EET1 =1 360 ;Entry b = address =1 361 ; EET2:EET1 data to be written =1 362 ; NV_CS and NV_SK = 0 =1 363 ;Uses EET0 to hold address =1 364 ; a, b destroyed =1 365 ;Calls EEA (issue command and address) =1 366 ; EEB (write byte) IAS2 Intelligent Audio Switcher ver 2 PAGE 11 =1 367 0168 =1 368 EEW: 0168 74A0 =1 369 mov a,#0A0h ;start bit and write command 016A 317D =1 370 acall EEA ;issue command and address 016C EF =1 371 mov a,EET2 ;write MSB 016D 3185 =1 372 acall EEB 016F EE =1 373 mov a,EET1 ;write LSB 0170 3185 =1 374 acall EEB 0172 C297 =1 375 clr NV_CS ;terminate write operation 0174 00 =1 376 nop 0175 D297 =1 377 setb NV_CS ;commence waiting for completion 0177 3094FD =1 378 jnb NV_DO,$ ;until NV_DO goes high 017A C297 =1 379 EEW1: clr NV_CS ;disable chip 017C 22 =1 380 ret =1 381 =1 382 =1 383 =1 384 ;EEPROM primitives =1 385 ;EEA - send 3 bit command and 8 bit address =1 386 ;Entry A = command (bits 7-5) =1 387 ; b = address =1 388 ; NV_CS and NV_SK = 0 =1 389 ;Uses EET0 to hold address =1 390 ; a, b destroyed =1 391 ;Calls EEB (fall thru) =1 392 ; EEC =1 393 017D =1 394 EEA: 017D ADF0 =1 395 mov EET0,b ;hold address for later 017F 75F003 =1 396 mov b,#3 ;command lth 0182 3188 =1 397 acall EEC ;send command 0184 ED =1 398 mov a,EET0 ;now send 8 bit address =1 399 =1 400 =1 401 ;EEB - send byte from *a* =1 402 ;Entry A = byte to send =1 403 ; b = don't care =1 404 ; NV_CS in unknown state =1 405 ; NV_SK = 0 =1 406 ;Uses a, b destroyed =1 407 ;Calls EEC (fall thru) =1 408 0185 =1 409 EEB: 0185 75F008 =1 410 mov b,#8 =1 411 =1 412 =1 413 ;EEC - send *b* bits from *a* =1 414 ;Entry A = bits to send, left justified =1 415 ; b = number of bits =1 416 ; NV_CS in unknown state =1 417 ; NV_SK = 0 =1 418 ;Uses a, b destroyed =1 419 ;Calls none =1 420 0188 =1 421 EEC: 0188 D297 =1 422 setb NV_CS ;enable chip 018A =1 423 EEC1: 018A 33 =1 424 rlc a ; move bit into CY IAS2 Intelligent Audio Switcher ver 2 PAGE 12 018B 9295 =1 425 mov NV_DI, c ; output bit 018D 00 =1 426 nop ; delay min 400 nS 018E D296 =1 427 setb NV_SK ; raise clock 0190 00 =1 428 nop ; delay min 400 nS 0191 C296 =1 429 clr NV_SK ; drop clock 0193 D5F0F4 =1 430 djnz b, EEC1 ; next bit 0196 22 =1 431 ret =1 432 =1 433 =1 434 ;EED - read 8 bits into *a* =1 435 ;Entry A = don't care =1 436 ; b = don't care =1 437 ; NV_CS in unknown state =1 438 ; NV_SK = 0 =1 439 ;Exit A = assembled byte =1 440 ;Uses a, b destroyed =1 441 ;Calls none =1 442 0197 =1 443 EED: 0197 75F008 =1 444 mov b, #8 ; init loop / delay min one uS 019A D297 =1 445 setb NV_CS ; enable chip 019C =1 446 EED1: 019C D296 =1 447 setb NV_SK ; raise clock 019E 00 =1 448 nop ; delay min one uS 019F A294 =1 449 mov c,NV_DO ; read serial data output 01A1 33 =1 450 rlc a ; shift in bit / delay min one uS 01A2 C296 =1 451 clr NV_SK ; drop clock 01A4 D5F0F5 =1 452 djnz b, EED1 ; next bit / delay min one uS 01A7 22 =1 453 ret 454 455 END VERSION 1.2h ASSEMBLY COMPLETE, 0 ERRORS FOUND IAS2 Intelligent Audio Switcher ver 2 PAGE 13 ACC. . . . . . . . . . . . . . . D ADDR 00E0H PREDEFINED AR0. . . . . . . . . . . . . . . D ADDR 0000H NOT USED AR1. . . . . . . . . . . . . . . D ADDR 0001H AR2. . . . . . . . . . . . . . . D ADDR 0002H AR3. . . . . . . . . . . . . . . D ADDR 0003H AR4. . . . . . . . . . . . . . . D ADDR 0004H NOT USED AR5. . . . . . . . . . . . . . . D ADDR 0005H NOT USED AR6. . . . . . . . . . . . . . . D ADDR 0006H NOT USED AR7. . . . . . . . . . . . . . . D ADDR 0007H NOT USED B. . . . . . . . . . . . . . . . D ADDR 00F0H PREDEFINED BSEG_LTH . . . . . . . . . . . . NUMB 0001H BUTTON1. . . . . . . . . . . . . C ADDR 0056H BUTTON2. . . . . . . . . . . . . C ADDR 005BH BUTTON3. . . . . . . . . . . . . C ADDR 0060H BUTTON4. . . . . . . . . . . . . C ADDR 0065H BUTTON5. . . . . . . . . . . . . C ADDR 006AH BUTTON6. . . . . . . . . . . . . C ADDR 0070H BUTTON7. . . . . . . . . . . . . C ADDR 0075H EEA. . . . . . . . . . . . . . . C ADDR 017DH EEB. . . . . . . . . . . . . . . C ADDR 0185H EEC. . . . . . . . . . . . . . . C ADDR 0188H EEC1 . . . . . . . . . . . . . . C ADDR 018AH EED. . . . . . . . . . . . . . . C ADDR 0197H EED1 . . . . . . . . . . . . . . C ADDR 019CH EER. . . . . . . . . . . . . . . C ADDR 014EH EET0 . . . . . . . . . . . . . . REG5 EET1 . . . . . . . . . . . . . . REG6 EET2 . . . . . . . . . . . . . . REG7 EEW. . . . . . . . . . . . . . . C ADDR 0168H NOT USED EEW1 . . . . . . . . . . . . . . C ADDR 017AH FLAGS. . . . . . . . . . . . . . D ADDR 0020H IE . . . . . . . . . . . . . . . D ADDR 00A8H PREDEFINED IT0. . . . . . . . . . . . . . . B ADDR 0088H PREDEFINED KBI. . . . . . . . . . . . . . . C ADDR 00F3H KBI1 . . . . . . . . . . . . . . C ADDR 010EH KBI2 . . . . . . . . . . . . . . C ADDR 0116H KBI3 . . . . . . . . . . . . . . C ADDR 011EH KBI4 . . . . . . . . . . . . . . C ADDR 0122H KBIN . . . . . . . . . . . . . . C ADDR 0089H KBIN1. . . . . . . . . . . . . . C ADDR 00A4H KBIX . . . . . . . . . . . . . . C ADDR 0129H KBO. . . . . . . . . . . . . . . C ADDR 012EH KBO1 . . . . . . . . . . . . . . C ADDR 0138H KBO2 . . . . . . . . . . . . . . C ADDR 0143H KBOUT. . . . . . . . . . . . . . C ADDR 00AEH KBOUT1 . . . . . . . . . . . . . C ADDR 00B5H KBOUT2 . . . . . . . . . . . . . C ADDR 00C8H KB_2B. . . . . . . . . . . . . . B ADDR 0005H KB_ASM . . . . . . . . . . . . . D ADDR 0021H KB_BUF . . . . . . . . . . . . . D ADDR 0022H KB_CLK . . . . . . . . . . . . . B ADDR 00B2H KB_CMDPRM. . . . . . . . . . . . C ADDR 00CCH NOT USED KB_CNT . . . . . . . . . . . . . D ADDR 0023H KB_DATA. . . . . . . . . . . . . B ADDR 00B3H KB_F1. . . . . . . . . . . . . . B ADDR 0000H KB_F2. . . . . . . . . . . . . . B ADDR 0001H KB_PB. . . . . . . . . . . . . . B ADDR 0003H KB_PR. . . . . . . . . . . . . . B ADDR 0004H IAS2 Intelligent Audio Switcher ver 2 PAGE 14 KB_READY . . . . . . . . . . . . B ADDR 0006H KB_SD1 . . . . . . . . . . . . . D ADDR 0024H KB_SD2 . . . . . . . . . . . . . D ADDR 0025H KB_SEND. . . . . . . . . . . . . C ADDR 00D1H KB_SETLED. . . . . . . . . . . . C ADDR 00CAH KB_SM. . . . . . . . . . . . . . B ADDR 0002H MAIN . . . . . . . . . . . . . . C ADDR 0050H NV_CS. . . . . . . . . . . . . . B ADDR 0097H NV_DI. . . . . . . . . . . . . . B ADDR 0095H NV_DO. . . . . . . . . . . . . . B ADDR 0094H NV_SK. . . . . . . . . . . . . . B ADDR 0096H ON_RESET . . . . . . . . . . . . C ADDR 0024H P0 . . . . . . . . . . . . . . . D ADDR 0080H PREDEFINED P1 . . . . . . . . . . . . . . . D ADDR 0090H PREDEFINED P2 . . . . . . . . . . . . . . . D ADDR 00A0H PREDEFINED P3 . . . . . . . . . . . . . . . D ADDR 00B0H PREDEFINED PCON . . . . . . . . . . . . . . D ADDR 0087H PREDEFINED PSW. . . . . . . . . . . . . . . D ADDR 00D0H PREDEFINED RI . . . . . . . . . . . . . . . B ADDR 0098H PREDEFINED SBUF . . . . . . . . . . . . . . D ADDR 0099H PREDEFINED SCON . . . . . . . . . . . . . . D ADDR 0098H PREDEFINED SERIN. . . . . . . . . . . . . . C ADDR 0082H SEROUT . . . . . . . . . . . . . C ADDR 007AH SP . . . . . . . . . . . . . . . D ADDR 0081H PREDEFINED STACK. . . . . . . . . . . . . . D ADDR 0008H TEST_ARM . . . . . . . . . . . . B ADDR 0007H TEST_DATA. . . . . . . . . . . . D ADDR 0026H TH1. . . . . . . . . . . . . . . D ADDR 008DH PREDEFINED TI . . . . . . . . . . . . . . . B ADDR 0099H PREDEFINED TMOD . . . . . . . . . . . . . . D ADDR 0089H PREDEFINED TR1. . . . . . . . . . . . . . . B ADDR 008EH PREDEFINED WDS. . . . . . . . . . . . . . . C ADDR 015FH NOT USED WDS1 . . . . . . . . . . . . . . C ADDR 0162H WEN. . . . . . . . . . . . . . . C ADDR 015AH NOT USED